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    JSA
    2007
    191views more  JSA 2007»
    Automated memory-aware application distribution for Multi-processor System-on-Chips
    13 years 7 months ago
    Automated memory-aware application distribution for Multi-processor System-on-Chips
    Download  zakalwe.fi
    Mapping of applications on a Multiprocessor System-on-Chip (MP-SoC) is a crucial step to optimize performance, energy and memory constraints at the same time. The problem is formu...
    Heikki Orsila, Tero Kangas, Erno Salminen, Timo D....
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    TSP
    2008
    87views more  TSP 2008»
    Interference Suppression for Memoryless Nonlinear Multiuser Systems Using Constellation Structure
    13 years 7 months ago
    Interference Suppression for Memoryless Nonlinear Multiuser Systems Using Constellation Structure
    Download  www.ifp.illinois.edu
    A generalized concept of interference suppression is introduced for multiuser systems with a known memoryless transmit non-linearity, such as in the downlink amplifier of a satelli...
    Ananya Sen Gupta, Andrew Singer
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    TMI
    1998
    134views more  TMI 1998»
    Speckle Reduction and Contrast Enhancement of Echocardiograms via Multiscale Nonlinear Processing
    13 years 7 months ago
    Speckle Reduction and Contrast Enhancement of Echocardiograms via Multiscale Nonlinear Processing
    Download  hbil.bme.columbia.edu
    Abstract— This paper presents an algorithm for speckle reduction and contrast enhancement of echocardiographic images. Within a framework of multiscale wavelet analysis, we apply...
    Xuli Zong, Andrew Laine, Edward A. Geiser
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    JSAC
    2010
    214views more  JSAC 2010»
    IEEE 802.15.5 WPAN mesh standard-low rate part: Meshing the wireless sensor networks
    13 years 6 months ago
    IEEE 802.15.5 WPAN mesh standard-low rate part: Meshing the wireless sensor networks
    Download  ees1d5.engr.ccny.cuny.edu
    —This paper introduces a new IEEE standard, IEEE 802.15.5,which provides mesh capability for wireless personal area network (WPAN) devices. The standard provides an architectural...
    Myung J. Lee, Rui Zhang, Jianliang Zheng, Gahng-Se...
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    TC
    2010
    174views Information Technology» more  TC 2010»
    Network-on-Chip Hardware Accelerators for Biological Sequence Alignment
    13 years 6 months ago
    Network-on-Chip Hardware Accelerators for Biological Sequence Alignment
    Download  www.eecs.wsu.edu
    —The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
    Souradip Sarkar, Gaurav Ramesh Kulkarni, Partha Pr...
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