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» Complexity-Effective Superscalar Processors
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ICS
2001
Tsinghua U.
13 years 12 months ago
Reducing the complexity of the issue logic
The issue logic of dynamically scheduled superscalar processors is one of their most complex and power-consuming parts. In this paper we present alternative issue-logic designs th...
Ramon Canal, Antonio González
PPSC
1997
13 years 8 months ago
Improving Memory-System Performance of Sparse Matrix-Vector Multiplication
Sparse matrix-vector multiplication is an important kernel that often runs inefficiently on superscalar RISC processors. This paper describes techniques that increase instruction-...
Sivan Toledo
HPCA
2000
IEEE
13 years 12 months ago
Decoupled Value Prediction on Trace Processors
Value prediction is a technique that breaks true data dependences by predicting the outcome of an instruction, and executes speculatively its data-dependent instructions based on ...
Sang Jeong Lee, Yuan Wang, Pen-Chung Yew
IPPS
2000
IEEE
13 years 12 months ago
Performance of On-Chip Multiprocessors for Vision Tasks
Abstract. Computer vision is a challenging data intensive application. Currently, superscalar architectures dominate the processor marketplace. As more transistors become available...
Yongwha Chung, K. Park, W. Hahn, Neungsoo Park, Vi...
FAC
2000
124views more  FAC 2000»
13 years 7 months ago
Algebraic Models of Correctness for Microprocessors
In this paper we present a method of describing microprocessors at different levels of temporal and data abstraction. We consider microprogrammed, pipelined and superscalar proces...
Anthony C. J. Fox, Neal A. Harman