Traditional architecture design approaches hide hardware uncertainties from the software stack through overdesign, which is often expensive in terms of power consumption. The recen...
We consider a multi-processor system-on-chip destined for streaming applications. An application is composed of one input and one output queue and in-between, several levels of ide...
A microprocessor integrated with DRAM on the same die has the potential to improve system performance by reducing the memory latency and improving the memory bandwidth. However, a...
A programmable vector processor and its implementation with a field-programmable gate array (FPGA) are presented. This processor is composed of a vector core and a tightly couple...
MOEA/D is a multi-objective metaheuristic which has shown a remarkable performance when solving hard optimization problems. In this paper, we propose a thread-based parallel versio...