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DAC
2005
ACM
14 years 8 months ago
Low power network processor design using clock gating
Abstract-- Network processors (NPs) have emerged as successful platforms to providing both high performance and flexibility in building powerful routers. Typical NPs incorporate mu...
Jia Yu, Jun Yang 0002, Laxmi N. Bhuyan, Yan Luo
ASAP
2005
IEEE
133views Hardware» more  ASAP 2005»
14 years 1 months ago
Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware
In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardwar...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...
ISORC
2000
IEEE
14 years 14 hour ago
Hybrid Sequence Charts
We introduce Hybrid Sequence Charts (HySCs) as a visual description technique for communication in hybrid system models. To that end, we adapt a subset of the well-known MSC synta...
Radu Grosu, Ingolf Krüger, Thomas Stauner
HIS
2001
13 years 9 months ago
A Bayesian Track-before-Detect Algorithm for IR Point Target Detection
An algorithm has been developed for the detection of point targets in uncluttered background based on a Bayesian track before detect method. The algorithm has an application in th...
Robert C. Warren
JUCS
2006
119views more  JUCS 2006»
13 years 7 months ago
Course Modeling for Student Profile Based Flexible Higher Education on the Internet
: Higher education courses are increasingly created as student organized collections of interrelated modules. At the same time, frequent change of subject matter and knowledge in i...
László Horváth, Imre J. Rudas