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» Compress-and-conquer for optimal multicore computing
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FPGA
2009
ACM
154views FPGA» more  FPGA 2009»
14 years 2 months ago
Synthesis of reconfigurable high-performance multicore systems
Reconfigurable high-performance computing systems (RHPC) have been attracting more and more attention over the past few years. RHPC systems are a promising solution for accelerati...
Jason Cong, Karthik Gururaj, Guoling Han
CGF
2011
13 years 1 months ago
A Parallel SPH Implementation on Multi-Core CPUs
This paper presents a parallel framework for simulating fluids with the Smoothed Particle Hydrodynamics (SPH) method. For low computational costs per simulation step, efficient ...
Markus Ihmsen, Nadir Akinci, Markus Becker, Matthi...
IPPS
2008
IEEE
14 years 1 months ago
High performance MPEG-2 software decoder on the cell broadband engine
The Sony-Toshiba-IBM Cell Broadband Engine is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD coprocessing units (SPEs) ...
David A. Bader, Sulabh Patel
NPC
2010
Springer
13 years 5 months ago
Exposing Tunable Parameters in Multi-threaded Numerical Code
Achieving high performance on today’s architectures requires careful orchestration of many optimization parameters. In particular, the presence of shared-caches on multicore arch...
Apan Qasem, Jichi Guo, Faizur Rahman, Qing Yi
IPPS
2007
IEEE
14 years 1 months ago
Multi-Core Model Checking with SPIN
—We present the first experimental results on the implementation of a multi-core model checking algorithm for the SPIN model checker. These algorithms specifically target shared-...
Gerard J. Holzmann, Dragan Bosnacki