165 search results - page 8 / 33 » Computational Logic: Memories of the Past and Challenges for... |
VLSI
2007
Springer
14 years 1 months ago
2007
Springer
— In the future, high performance computing systems may consist of multiple multicore processors and reconfigurable logic coprocessors. Industry trends indicate that such coproc...
VRCAI
2009
ACM
14 years 1 months ago
2009
ACM
In this paper, we mention about various techniques in order to create ”socially intelligent virtual humans” which can interact with people using natural ways of communication....
DSN
2002
IEEE
14 years 11 days ago
2002
IEEE
This paper examines the effect of technology scaling and microarchitectural trends on the rate of soft errors in CMOS memory and logic circuits. We describe and validate an end-to...
ACMDIS
2000
ACM
13 years 11 months ago
2000
ACM
Designing concepts for new mobile services and devices, poses several challenges to the design. We consider user participation as a way to address part of the challenges. We show ...
WMPI
2004
ACM
14 years 25 days ago
2004
ACM
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past dec...