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CF
2004
ACM
14 years 1 months ago
The happy marriage of architecture and application in next-generation reconfigurable systems
New applications and standards are first conceived only for functional correctness and without concerns for the target architecture. The next challenge is to map them onto an arch...
Ingrid Verbauwhede, Patrick Schaumont
APCSAC
2006
IEEE
14 years 1 months ago
A High Performance Simulator System for a Multiprocessor System Based on a Multi-way Cluster
In the ubiquitous era, it is necessary to research the architectures of multiprocessor system with high performance and low power consumption. A simulator developed in high level l...
Arata Shinozaki, Masatoshi Shima, Minyi Guo, Mitsu...
CONCURRENCY
2010
130views more  CONCURRENCY 2010»
13 years 7 months ago
Enabling high-speed asynchronous data extraction and transfer using DART
As the complexity and scale of current scientific and engineering applications grow, managing and transporting the large amounts of data they generate is quickly becoming a signif...
Ciprian Docan, Manish Parashar, Scott Klasky
DCOSS
2008
Springer
13 years 9 months ago
Decoding Code on a Sensor Node
Abstract. Wireless sensor networks come of age and start moving out of the laboratory into the field. As the number of deployments is increasing the need for an efficient and relia...
Pascal von Rickenbach, Roger Wattenhofer
ARITH
1999
IEEE
14 years 7 hour ago
Multiplications of Floating Point Expansions
In modern computers, the floating point unit is the part of the processor delivering the highest computing power and getting most attention from the design team. Performance of an...
Marc Daumas