1474 search results - page 37 / 295 » Computing in Memory Architectures for Digital Image Processi... |
137
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SC
1995
ACM
15 years 6 months ago
1995
ACM
The Convex SPP-1000 is the first commercial implementation of a new generation of scalable shared memory parallel computers with full cache coherence. It employs a hierarchical s...
156
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IPPS
2005
IEEE
15 years 8 months ago
2005
IEEE
This paper presents a compiler methodology for memoryaware mapping on 2-Dimensional coarse-grained reconfigurable architectures that aims in improving the mapped applications’ p...
139
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ISPAN
1997
IEEE
15 years 6 months ago
1997
IEEE
The thesis of this research is that the task of exposing the parallelism in a given application should be left to the algorithm designer, who has intimate knowledge of the applica...
158
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IFIP
2005
Springer
15 years 8 months ago
2005
Springer
Digital forensic investigators are often faced with the task of manually examining a large number of (photographic) images in order to identify potential evidence. The task can be...
117
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ICCD
1997
IEEE
15 years 6 months ago
1997
IEEE
The goal of Intelligent RAM (IRAM) is to design a cost-effective computer by designing a processor in a memory fabrication process, instead of in a conventional logic fabrication ...