Sciweavers

4401 search results - page 703 / 881
» Computing with Default Logic
Sort
View
HPCA
1999
IEEE
14 years 2 months ago
Using Lamport Clocks to Reason about Relaxed Memory Models
Cache coherence protocols of current shared-memory multiprocessors are difficult to verify. Our previous work proposed an extension of Lamport's logical clocks for showing th...
Anne Condon, Mark D. Hill, Manoj Plakal, Daniel J....
IEEEPACT
1999
IEEE
14 years 2 months ago
A Cost-Effective Clustered Architecture
In current superscalar processors, all floating-point resources are idle during the execution of integer programs. As previous works show, this problem can be alleviated if the fl...
Ramon Canal, Joan-Manuel Parcerisa, Antonio Gonz&a...
IPPS
1999
IEEE
14 years 2 months ago
Marshaling/Demarshaling as a Compilation/Interpretation Process
Marshaling is the process through which structured values are serialized into a stream of bytes; demarshaling converts this stream of bytes back to structured values. Most often, ...
Christian Queinnec
CONCUR
1999
Springer
14 years 2 months ago
Partial Order Reduction for Model Checking of Timed Automata
Abstract. The paper presents a partial order reduction method applicable to networks of timed automata. The advantage of the method is that it reduces both the number of explored c...
Marius Minea
HUC
1999
Springer
14 years 2 months ago
Advanced Interaction in Context
Mobile information appliances are increasingly used in numerous different situations and locations, setting new requirements to their interaction methods. When the user's situ...
Albrecht Schmidt, Kofi Asante Aidoo, Antti Takaluo...