Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
As more and more information is available on the web, it is a problem that many web resources are not accessible, i.e., are not usable for users with special needs. For example, f...
We report on a case study in which the model checker Uppaal is used to formally model parts of Zeroconf, a protocol for dynamic configuration of IPv4 link-local addresses that has...
Biniam Gebremichael, Frits W. Vaandrager, Miaomiao...
Many aspect-oriented middleware platforms support run-time aspect weaving, but do not support coordinating distributed changes to a set of aspects at run-time. A distributed chang...
Eddy Truyen, Nico Janssens, Frans Sanen, Wouter Jo...