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CISIS
2010
IEEE
14 years 2 months ago
Threaded Dynamic Memory Management in Many-Core Processors
—Current trends in desktop processor design have been toward many-core solutions with increased parallelism. As the number of supported threads grows in these processors, it may ...
Edward C. Herrmann, Philip A. Wilsey
ISPASS
2010
IEEE
14 years 2 months ago
Cache contention and application performance prediction for multi-core systems
—The ongoing move to chip multiprocessors (CMPs) permits greater sharing of last-level cache by processor cores but this sharing aggravates the cache contention problem, potentia...
Chi Xu, Xi Chen, Robert P. Dick, Zhuoqing Morley M...
ISPASS
2009
IEEE
14 years 2 months ago
Analyzing CUDA workloads using a detailed GPU simulator
Modern Graphic Processing Units (GPUs) provide sufficiently flexible programming models that understanding their performance can provide insight in designing tomorrow’s manyco...
Ali Bakhoda, George L. Yuan, Wilson W. L. Fung, He...
EDBT
2009
ACM
166views Database» more  EDBT 2009»
14 years 2 months ago
Shore-MT: a scalable storage manager for the multicore era
Database storage managers have long been able to efficiently handle multiple concurrent requests. Until recently, however, a computer contained only a few single-core CPUs, and th...
Ryan Johnson, Ippokratis Pandis, Nikos Hardavellas...
CGO
2008
IEEE
14 years 2 months ago
Spice: speculative parallel iteration chunk execution
The recent trend in the processor industry of packing multiple processor cores in a chip has increased the importance of automatic techniques for extracting thread level paralleli...
Easwaran Raman, Neil Vachharajani, Ram Rangan, Dav...