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» Concurrent Fault Detection in Random Combinational Logic
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TVLSI
2002
111views more  TVLSI 2002»
13 years 6 months ago
Circular BIST with state skipping
Circular built-in self-test (BIST) is a "test per clock" scheme that offers many advantages compared with conventional BIST approaches in terms of low area overhead, simp...
Nur A. Touba
CORR
2010
Springer
158views Education» more  CORR 2010»
13 years 1 months ago
Efficient Approaches for Designing Fault Tolerant Reversible Carry Look-Ahead and Carry-Skip Adders
Combinational or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its correspon...
Md. Saiful Islam 0003, Muhammad Mahbubur Rahman, Z...
ISPDC
2008
IEEE
14 years 1 months ago
Token Loss Detection for Random Walk based Algorithm
Self-stabilizing token circulation algorithms are not always adapted for dynamic networks. Random walks are well known to play a crucial role in the design of randomized algorithm...
Thibault Bernard, Alain Bui, Devan Sohier
FDTC
2010
Springer
132views Cryptology» more  FDTC 2010»
13 years 4 months ago
Fault Injection Resilience
Fault injections constitute a major threat to the security of embedded systems. The errors in the cryptographic algorithms have been shown to be extremely dangerous, since powerful...
Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger,...
VLSID
1993
IEEE
136views VLSI» more  VLSID 1993»
13 years 10 months ago
A Simulation-Based Test Generation Scheme Using Genetic Algorithms
This paper discusses a Genetic Algorithm-based method of generating test vectorsfor detecting faults in combinational circuits. The GA-based approach combines the merits of two te...
M. Srinivas, Lalit M. Patnaik