Sciweavers

734 search results - page 20 / 147
» Configurable Transactional Memory
Sort
View
FPL
2000
Springer
143views Hardware» more  FPL 2000»
14 years 7 days ago
Memory Access Schemes for Configurable Processors
Abstract. This work discusses the Memory Architecture for Reconfigurable Computers (MARC), a scalable, device-independent memory interface that supports both irregular (via configu...
Holger Lange, Andreas Koch
IPPS
2000
IEEE
14 years 1 months ago
Using Logs to Increase Availability in Real-Time Main-Memory Database
Abstract. Real-time main-memory databases are useful in real-time environments. They are often faster and provide more predictable execution of transactions than disk-based databas...
Tiina Niklander, Kimmo E. E. Raatikainen
PPOPP
2009
ACM
14 years 9 months ago
Safe open-nested transactions through ownership
Researchers in transactional memory (TM) have proposed open nesting as a methodology for increasing the concurrency of transactional programs. The idea is to ignore "low-leve...
Kunal Agrawal, I.-Ting Angelina Lee, Jim Sukha
IPPS
2006
IEEE
14 years 2 months ago
A configuration memory hierarchy for fast reconfiguration with reduced energy consumption overhead
Currently run-time reconfigurable hardware offers really attractive features for embedded systems, such as flexibility, reusability, high performance and, in some cases, low-power...
Elena Perez Ramo, Javier Resano, Daniel Mozos, Fra...
FPL
2005
Springer
140views Hardware» more  FPL 2005»
14 years 2 months ago
A Configuration Memory Architecture for Fast Run-Time-Reconfiguration of FPGAs
This paper presents a configuration memory architecture that offers fast FPGA reconfiguration. The underlying principle behind the design is the use of fine-grained partial rec...
Usama Malik, Oliver Diessel