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ASPLOS
1992
ACM
15 years 6 months ago
Closing the Window of Vulnerability in Multiphase Memory Transactions
Multiprocessor architects have begun to explore several mechanisms such as prefetching, context-switching and software-assisted dynamic cache-coherence, which transform single-pha...
John Kubiatowicz, David Chaiken, Anant Agarwal
138
Voted
PVLDB
2008
96views more  PVLDB 2008»
15 years 1 months ago
H-store: a high-performance, distributed main memory transaction processing system
Our previous work has shown that architectural and application shifts have resulted in modern OLTP databases increasingly falling short of optimal performance [10]. In particular,...
Robert Kallman, Hideaki Kimura, Jonathan Natkins, ...
ETFA
2006
IEEE
15 years 8 months ago
A Framework for Fault Tolerant Real Time Systems Based on Reconfigurable FPGAs
♦ To increase the amount of logic available to the users in SRAM-based FPGAs, manufacturers are using nanometric technologies to boost logic density and reduce costs, making its ...
Manuel G. Gericota, Luís F. Lemos, Gustavo ...
94
Voted
PPOPP
2009
ACM
15 years 7 months ago
Turbocharging boosted transactions or: how i learnt to stop worrying and love longer transactions
Boosted transactions offer an attractive method that enables programmers to create larger transactions that scale well and offer deadlock-free guarantees. However, as boosted tran...
Chinmay Eishan Kulkarni, Osman S. Unsal, Adri&aacu...