Sciweavers

44 search results - page 1 / 9
» Configurable multi-processor architecture and its processor ...
Sort
View
ASPDAC
2006
ACM
119views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Configurable multi-processor architecture and its processor element design
Tsutomu Nishimura, Takuji Miki, Hiroaki Sugiura, Y...
DAC
2007
ACM
14 years 8 months ago
Chip Multi-Processor Generator
The drive for low-power, high performance computation coupled with the extremely high design costs for ASIC designs, has driven a number of designers to try to create a flexible, ...
Alex Solomatnikov, Amin Firoozshahian, Wajahat Qad...
ICS
2009
Tsinghua U.
14 years 6 days ago
A comprehensive power-performance model for NoCs with multi-flit channel buffers
Large Multi-Processor Systems-on-Chip use Networks-on-Chip with a high degree of reusability and scalability for message communication. Therefore, network infrastructure is a cruc...
Mohammad Arjomand, Hamid Sarbazi-Azad
SBACPAD
2007
IEEE
130views Hardware» more  SBACPAD 2007»
14 years 1 months ago
Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP)
In this paper, an adaptive wormhole router for a flexible on-chip interconnection network is proposed and implemented for a Chip-Multi Processor (CMP). It adopts a wormhole switc...
Seung Eun Lee, Jun Ho Bahn, Nader Bagherzadeh
ARCS
2006
Springer
13 years 11 months ago
Estimating Energy Consumption for an MPSoC Architectural Exploration
Early energy estimation is increasingly important in MultiProcessor System-On-Chip (MPSoC) design. Applying traditional approaches, which consist in delaying the estimation until t...
Rabie Ben Atitallah, Smaïl Niar, Alain Greine...