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ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
14 years 5 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
TEI
2010
ACM
147views Hardware» more  TEI 2010»
14 years 3 months ago
A robust and accurate 3d hand posture estimation method for interactive systems
In this paper, a new 3D hand posture estimation system using a single camera and 3 interactive systems are introduced. Existing hand gesture recognition systems estimate hand'...
Emi Tamaki
SENSYS
2009
ACM
14 years 3 months ago
A wireless sensor network for border surveillance
We will demonstrate a wireless sensor network system for the surveillance of critical areas and properties – e.g. borders. The system consists of up to 10 sensor nodes that moni...
Denise Dudek, Christian Haas, Andreas Kuntz, Marti...
CIKM
2009
Springer
14 years 3 months ago
SPIDER: a system for scalable, parallel / distributed evaluation of large-scale RDF data
RDF is a data model for representing labeled directed graphs, and it is used as an important building block of semantic web. Due to its flexibility and applicability, RDF has bee...
Hyunsik Choi, Jihoon Son, YongHyun Cho, Min Kyoung...
CF
2009
ACM
14 years 3 months ago
Core monitors: monitoring performance in multicore processors
As we reach the limits of single-core computing, we are promised more and more cores in our systems. Modern architectures include many performance counters per core, but few or no...
Paul E. West, Yuval Peress, Gary S. Tyson, Sally A...