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DFT
2006
IEEE
105views VLSI» more  DFT 2006»
14 years 1 months ago
Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving
1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...
Zhiyuan He, Zebo Peng, Petru Eles, Paul M. Rosinge...
APLAS
2006
ACM
14 years 1 months ago
Automatic Testing of Higher Order Functions
This paper tackles a problem often overlooked in functional programming community: that of testing. Fully automatic test tools like Quickcheck and G∀ST can test first order func...
Pieter W. M. Koopman, Rinus Plasmeijer
ISSRE
2005
IEEE
14 years 1 months ago
Synchronous Testing of Multimodal Systems: An Operational Profile-Based Approach
In this paper we present a method for automatically testing interactive multimodal systems1 . The proposed approach was originally dedicated to synchronous programming which is ma...
Laya Madani, Catherine Oriat, Ioannis Parissis, Ju...
CCECE
2011
IEEE
12 years 7 months ago
Towards a portable, memory-efficient test system for Conducted Energy Weapons
We present a readily portable, memory-efficient performance test system (PTS) for Tasers. The proposed PTS has been developped for the most widely used Conducted Energy Weapons (...
Peyman Rahmati, David Dawson, Andy Adler
BMCBI
2006
101views more  BMCBI 2006»
13 years 7 months ago
SynTReN: a generator of synthetic gene expression data for design and analysis of structure learning algorithms
Background: The development of algorithms to infer the structure of gene regulatory networks based on expression data is an important subject in bioinformatics research. Validatio...
Tim Van den Bulcke, Koen Van Leemput, Bart Naudts,...