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ICPP
1991
IEEE
14 years 1 months ago
Two Techniques to Enhance the Performance of Memory Consistency Models
The memory consistency model supported by a multiprocessor directly affects its performance. Thus, several attempts have been made to relax the consistency models to allow for mor...
Kourosh Gharachorloo, Anoop Gupta, John L. Henness...
AIPS
2007
14 years 8 days ago
Bounding the Resource Availability of Activities with Linear Resource Impact
We introduce the Linear Resource Temporal Network (LRTN), which consists of activities that consume or produce a resource, subject to absolute and relative metric temporal constra...
Jeremy Frank, Paul H. Morris
ARC
2008
Springer
155views Hardware» more  ARC 2008»
13 years 12 months ago
Run-time Adaptable Architectures for Heterogeneous Behavior Embedded Systems
As embedded applications are getting more complex, they are also demanding highly diverse computational capabilities. The majority of all previously proposed reconfigurable archite...
Antonio Carlos Schneider Beck, Mateus B. Rutzig, G...
ASAP
2008
IEEE
199views Hardware» more  ASAP 2008»
13 years 12 months ago
An efficient method for evaluating polynomial and rational function approximations
In this paper we extend the domain of applicability of the E-method [7, 8], as a hardware-oriented method for evaluating elementary functions using polynomial and rational functio...
Nicolas Brisebarre, Sylvain Chevillard, Milos D. E...
ASPDAC
2008
ACM
145views Hardware» more  ASPDAC 2008»
13 years 12 months ago
Mixed integer linear programming-based optimal topology synthesis of cascaded crossbar switches
- We present a topology synthesis method for high performance System-on-Chip (SoC) design. Our method provides an optimal topology of on-chip communication network for the given ba...
Minje Jun, Sungjoo Yoo, Eui-Young Chung