62 search results - page 6 / 13 » Construction of a Hierarchical Translation Memory |
HPCC
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. Constructing flash memory based storage, FTL (Flash Translation Layer) manages mapping between logical address and physical address. Since FTL writes every data to new r...
TSE
2008
13 years 7 months ago
2008
Timed Automata have proven to be useful for specification and verification of real-time systems. System design using Timed Automata relies on explicit manipulation of clock variabl...
IROS
2006
IEEE
14 years 1 months ago
2006
IEEE
Abstract— We present a computational framework for automatic deployment of robots in 2D and 3D rectangular environments with polytopal obstacles. The results are derived for poly...
PPAM
2007
Springer
14 years 1 months ago
2007
Springer
There are several parallel programming models available for numerical computations at different levels of expressibility and ease of use. For the development of new domain speciï¬...
JSA
2002
13 years 7 months ago
2002
This paper examines some models of FSMs that can be implemented in dynamically and statically reconfigurable FPGAs. They enable circuits for the FSMs to be constructed in such a wa...