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SIGCOMM
2010
ACM
15 years 6 months ago
Scalable flow-based networking with DIFANE
Ideally, enterprise administrators could specify fine-grain policies that drive how the underlying switches forward, drop, and measure traffic. However, existing techniques for fl...
Minlan Yu, Jennifer Rexford, Michael J. Freedman, ...
AHS
2007
IEEE
215views Hardware» more  AHS 2007»
15 years 6 months ago
Online Evolution for a High-Speed Image Recognition System Implemented On a Virtex-II Pro FPGA
Online incremental evolution for a complex high-speed pattern recognition architecture has been implemented on a Xilinx Virtex-II Pro FPGA. The fitness evaluation module is entir...
Kyrre Glette, Jim Torresen, Moritoshi Yasunaga
CODES
2008
IEEE
15 years 6 months ago
Methodology for multi-granularity embedded processor power model generation for an ESL design flow
With power becoming a major constraint for multi-processor embedded systems, it is becoming important for designers to characterize and model processor power dissipation. It is cr...
Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi,...
AC
2008
Springer
15 years 6 months ago
DARPA's HPCS Program- History, Models, Tools, Languages
The historical context surrounding the birth of the DARPA High Productivity Computing Systems (HPCS) program is important for understanding why federal government agencies launche...
Jack Dongarra, Robert Graybill, William Harrod, Ro...
COMPUTER
2006
98views more  COMPUTER 2006»
15 years 6 months ago
Componentization: The Visitor Example
: In software design, laziness is a virtue: it's better to reuse than to redo. Design patterns are a good illustration. Patterns, a major advance in software architecture, pro...
Bertrand Meyer, Karine Arnout