Abstract. A recent contribution to the formal specification and verification of concurrent systems is the integration of the state- and event-based approaches B and CSP, specifical...
This paper presents VyrdMC, a runtime verification tool we are building for concurrent software components. The correctness criterion checked by VyrdMC is refinement: Each executi...
Abstract. We present a new technique called Monotonic Partial Order Reduction (MPOR) that effectively combines dynamic partial order reduction with symbolic state space exploration...
The outcome of verifying software is often a `counterexample', i.e., a listing of the actions and states of a behavior not satisfying the specification. In order to understan...
Combining verification methods developed separately for software and hardware is motivated by the industry's need for a technology that would make formal verification of reali...
Robert P. Kurshan, Vladimir Levin, Marius Minea, D...