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CIBSE
2008
ACM
13 years 9 months ago
Using Refinement Checking as System Testing
Abstract. Software testing is an expensive and time-consuming activity; it is also error-prone due to human factors. But, it still is the most common effort used in the software in...
Cristiano Bertolini, Alexandre Mota
ISQED
2003
IEEE
113views Hardware» more  ISQED 2003»
14 years 23 days ago
Using Integer Equations for High Level Formal Verification Property Checking
This paper describes the use of integer equations for high level modeling digital circuits for application of formal verification properties at this level. Most formal verificatio...
Bijan Alizadeh, Mohammad Reza Kakoee
ICSE
2010
IEEE-ACM
14 years 8 days ago
An empirical study of optimizations in YOGI
Though verification tools are finding industrial use, the utility of engineering optimizations that make them scalable and usable is not widely known. Despite the fact that seve...
Aditya V. Nori, Sriram K. Rajamani
WOA
2007
13 years 8 months ago
Declarative representation of curricula models: an LTL- and UML-based approach
Abstract—In this work, we present a constrained-based representation for specifying the goals of “course design”, that we call curricula model, and introduce a graphical lang...
Matteo Baldoni, Cristina Baroglio, Giuseppe Berio,...
RE
2001
Springer
13 years 12 months ago
Events and Constraints: A Graphical Editor for Capturing Logic Requirements of Programs
A logic model checker can be an effective tool for debugging software applications. A stumbling block can be that model checking tools expect the user to supply a formal statement...
Margaret H. Smith, Gerard J. Holzmann, Kousha Etes...