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CCECE
2006
IEEE
14 years 1 months ago
QOS Driven Network-on-Chip Design for Real Time Systems
Real Time embedded system designers are facing extreme challenges in underlying architectural design selection. It involves the selection of a programmable, concurrent, heterogene...
Ankur Agarwal, Mehmet Mustafa, Abhijit S. Pandya
CAISE
2008
Springer
13 years 9 months ago
An Hybrid Design Solution For Spacecraft Simulators
Abstract. The European Space Agency (ESA) has created the Simulation Model Portability 2 (SMP2) standard with the purpose to provide a design solution for the project of Spacecraft...
Vitor Rodrigues, João Correia Lopes, Ana Mo...
SIGSOFT
2004
ACM
14 years 8 months ago
Testing static analysis tools using exploitable buffer overflows from open source code
Five modern static analysis tools (ARCHER, BOON, PolySpace C Verifier, Splint, and UNO) were evaluated using source code examples containing 14 exploitable buffer overflow vulnera...
Misha Zitser, Richard Lippmann, Tim Leek
CASES
2001
ACM
13 years 11 months ago
Patchable instruction ROM architecture
Increased systems level integration has meant the movement of many traditionally off chip components onto a single chip including a processor, instruction storage, data path, and ...
Timothy Sherwood, Brad Calder
CNSR
2005
IEEE
112views Communications» more  CNSR 2005»
14 years 1 months ago
Generating Representative Traffic for Intrusion Detection System Benchmarking
In this paper, a modeling and simulation framework is proposed for generating data for training and testing intrusion detection systems. The framework can develop models of web us...
Hilmi Günes Kayacik, A. Nur Zincir-Heywood