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ISSS
2000
IEEE
144views Hardware» more  ISSS 2000»
14 years 8 days ago
Efficient Hardware Controller Synthesis for Synchronous Dataflow Graph in System Level Design
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
Hyunuk Jung, Kangnyoung Lee, Soonhoi Ha
DAC
2000
ACM
14 years 8 months ago
Synthesis and optimization of coordination controllers for distributed embedded systems
A main advantage of control composition with modal processes [4] is the enhanced retargetability of the composed behavior over a wide variety of target architectures. Unlike previ...
Pai H. Chou, Gaetano Borriello
MLMI
2004
Springer
14 years 1 months ago
A Mixed-Lingual Phonological Component Which Drives the Statistical Prosody Control of a Polyglot TTS Synthesis System
A polyglot text-to-speech synthesis system which is able to read aloud mixed-lingual text has first of all to derive the correct pronunciation. This is achieved with an accurate m...
Harald Romsdorfer, Beat Pfister, René Beutl...
HYBRID
2007
Springer
14 years 2 months ago
Hierarchical Synthesis of Hybrid Controllers from Temporal Logic Specifications
Georgios E. Fainekos, Antoine Girard, George J. Pa...
IJSYSC
2000
86views more  IJSYSC 2000»
13 years 7 months ago
Synthesis of minimax optimal controllers for uncertain time-delay systems with structured uncertainty
This paper is concerned with the design of robust state feedback controllers for a class of uncertain time-delay systems. The uncertainty is assumed to satisfy a certain integral ...
S. O. Reza Moheimani, Andrey V. Savkin, Ian R. Pet...