275 search results - page 51 / 55 » Core architecture optimization for heterogeneous chip multip... |
ISPASS
2008
IEEE
14 years 3 months ago
2008
IEEE
Although the best processor design for executing a specific workload does depend on the characteristics of the workload, it can not be determined without factoring-in the effect o...
MOBICOM
2009
ACM
14 years 3 months ago
2009
ACM
This paper describes an unconventional way to apply wireless networking in emerging technologies. It makes the case for using a two-tier hybrid wireless/wired architecture to inte...
IWMM
2011
Springer
12 years 11 months ago
2011
Springer
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...
ICS
2005
Tsinghua U.
14 years 2 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
ASPLOS
2008
ACM
13 years 10 months ago
2008
ACM
Extracting high-performance from the emerging Chip Multiprocessors (CMPs) requires that the application be divided into multiple threads. Each thread executes on a separate core t...