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PATMOS
2004
Springer
14 years 4 months ago
Delay Evaluation of High Speed Data-Path Circuits Based on Threshold Logic
The main result is the development, and delay comparison based on Logical Effort, of a number of high speed circuits for common arithmetic and related operations using threshold l...
Peter Celinski, Derek Abbott, Sorin Cotofana
FOSSACS
2008
Springer
14 years 12 days ago
Model Checking Freeze LTL over One-Counter Automata
We study complexity issues related to the model-checking problem for LTL with registers (a.k.a. freeze LTL) over one-counter automata. We consider several classes of one-counter au...
Stéphane Demri, Ranko Lazic, Arnaud Sangnie...
HICSS
2006
IEEE
142views Biometrics» more  HICSS 2006»
14 years 4 months ago
Measuring the Effectiveness of Honeypot Counter-Counterdeception
Honeypots are computer systems that try to fool cyberattackers into thinking they are ordinary computer systems, when in fact they are designed solely to collect data about attack...
Neil C. Rowe
TACAS
2007
Springer
105views Algorithms» more  TACAS 2007»
14 years 5 months ago
Hoare Logic for Realistically Modelled Machine Code
This paper presents a mechanised Hoare-style programming logic framework for assembly level programs. The framework has been designed to fit on top of operational semantics of rea...
Magnus O. Myreen, Michael J. C. Gordon
CONCUR
2000
Springer
14 years 2 months ago
Reachability Analysis for Some Models of Infinite-State Transition Systems
We introduce some new models of infinite-state transition systems. The basic model, called a (reversal-bounded) counter machine (CM), is a nondeterministic finite automaton augment...
Oscar H. Ibarra, Tevfik Bultan, Jianwen Su