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» Criteria for the evaluation of implemented architectures
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SECON
2010
IEEE
13 years 5 months ago
Coexistence-Aware Scheduling for Wireless System-on-a-Chip Devices
Abstract--Today's mobile devices support many wireless technologies to achieve ubiquitous connectivity. Economic and energy constraints, however, drive the industry to impleme...
Lei Yang, Vinod Kone, Xue Yang, York Liu, Ben Y. Z...
USS
2010
13 years 5 months ago
P4P: Practical Large-Scale Privacy-Preserving Distributed Computation Robust against Malicious Users
In this paper we introduce a framework for privacypreserving distributed computation that is practical for many real-world applications. The framework is called Peers for Privacy ...
Yitao Duan, NetEase Youdao, John Canny, Justin Z. ...
GLVLSI
2011
IEEE
344views VLSI» more  GLVLSI 2011»
12 years 11 months ago
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
Azam Seyedi, Adrià Armejach, Adrián ...
ICDE
2011
IEEE
281views Database» more  ICDE 2011»
12 years 11 months ago
Declarative analysis of noisy information networks
—There is a growing interest in methods for analyzing data describing networks of all types, including information, biological, physical, and social networks. Typically the data ...
Walaa Eldin Moustafa, Galileo Namata, Amol Deshpan...
IPSN
2011
Springer
12 years 11 months ago
SpiderBat: Augmenting wireless sensor networks with distance and angle information
Having access to accurate position information is a key requirement for many wireless sensor network applications. We present the design, implementation and evaluation of SpiderBa...
Georg Oberholzer, Philipp Sommer, Roger Wattenhofe...