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» Crosstalk noise in FPGAs
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SBCCI
2004
ACM
134views VLSI» more  SBCCI 2004»
14 years 1 months ago
An approach to computer simulation of bonding and package crosstalk in mixed-signal CMOS ICs
This paper presents an approach for simulation of mixed analog-digital CMOS integrated circuits, aiming at estimating crosstalk effects due to current pulses drawn from voltage s...
Gabriella Trucco, Giorgio Boselli, Valentino Liber...
VTS
2002
IEEE
113views Hardware» more  VTS 2002»
14 years 16 days ago
LI-BIST: A Low-Cost Self-Test Scheme for SoC Logic Cores and Interconnects
For deep sub-micron system-on-chips (SoC), interconnects are critical determinants of performance, reliability and power. Buses and long interconnects being susceptible to crossta...
Krishna Sekar, Sujit Dey
ASYNC
1999
IEEE
110views Hardware» more  ASYNC 1999»
13 years 12 months ago
Behavioral Transformations to Increase Noise Immunity in Asynchronous Specifications
Noise immunity is becomingone of the most important design parameters for deep-sub-micron (DSM) technologies. Asynchronous circuits seem to be a good candidate to alleviate the pr...
Alexander Taubin, Alex Kondratyev, Jordi Cortadell...
IMAGING
2004
13 years 9 months ago
Minimizing the Perception of Chromatic Noise in Digital Images
: A psychophysical experiment was performed to measure the visibility of chromatic noise. Through Principle Component Analysis (PCA) on the results of this experiment, an orthogona...
Xiaoyan Song, Garrett M. Johnson, Mark D. Fairchil...
ITNG
2007
IEEE
14 years 1 months ago
Multi-path Routing for Mesh/Torus-Based NoCs
In networks-on-chip (NoC) designs, delay variations and crosstalk noise have become a serious issue with the continuously shrinking geometry of semiconductor devices and the incre...
Yaoting Jiao, Yulu Yang, Ming He, Mei Yang, Yingta...