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IPPS
2000
IEEE
14 years 1 months ago
2000
IEEE
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...
IPPS
2000
IEEE
14 years 1 months ago
2000
IEEE
Only a handful of fundamental mechanisms for synchronizing the access of concurrent threads to shared memory are widely implemented and used. These include locks, condition variab...
ICS
1999
Tsinghua U.
14 years 1 months ago
1999
Tsinghua U.
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
ICPP
1998
IEEE
14 years 1 months ago
1998
IEEE
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
ICS
1989
Tsinghua U.
14 years 1 months ago
1989
Tsinghua U.
Control intensive scalar programs pose a very different challenge to highly pipelined supercomputers than vectorizable numeric applications. Function call/return and branch instru...