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EUROPAR
2010
Springer
13 years 10 months ago
Efficient Address Mapping of Shared Cache for On-Chip Many-Core Architecture
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
Fenglong Song, Dongrui Fan, Zhiyong Liu, Junchao Z...
IPPS
2010
IEEE
13 years 7 months ago
J2EE instrumentation for software aging root cause application component determination with AspectJ
Unplanned system outages have a negative impact on company revenues and image. While the last decades have seen a lot of efforts from industry and academia to avoid them, they stil...
Javier Alonso, Jordi Torres, Josep Lluis Berral, R...
HPCA
2011
IEEE
13 years 26 days ago
Calvin: Deterministic or not? Free will to choose
Most shared memory systems maximize performance by unpredictably resolving memory races. Unpredictable memory races can lead to nondeterminism in parallel programs, which can suff...
Derek Hower, Polina Dudnik, Mark D. Hill, David A....
HPCA
2011
IEEE
13 years 26 days ago
Bloom Filter Guided Transaction Scheduling
Contention management is an important design component to a transactional memory system. Without effective contention management to ensure forward progress, a transactional memory...
Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mu...
ICS
2005
Tsinghua U.
14 years 2 months ago
Towards automatic translation of OpenMP to MPI
We present compiler techniques for translating OpenMP shared-memory parallel applications into MPI messagepassing programs for execution on distributed memory systems. This transl...
Ayon Basumallik, Rudolf Eigenmann