Sciweavers

1536 search results - page 308 / 308
» DPS - Dynamic Parallel Schedules
Sort
View
145
Voted
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
15 years 28 days ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...