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» DRAMSim2: A Cycle Accurate Memory System Simulator
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IJES
2007
71views more  IJES 2007»
13 years 7 months ago
Power management in external memory using PA-CDRAM
Abstract: Main memory has become one of the largest contributors to overall energy consumption and offers many opportunities for power/energy reduction. In this paper, we propose ...
Nevine AbouGhazaleh, Bruce R. Childers, Daniel Mos...
ICCD
2000
IEEE
69views Hardware» more  ICCD 2000»
13 years 12 months ago
Hierarchical Simulation of a Multiprocessor Architecture
When proposing new architectural enhancements, it is also important to account for the hardware complexity. To achieve this goal, we propose to model the new design in a hardware ...
Marius Pirvu, Laxmi N. Bhuyan, Rabi N. Mahapatra
CODES
2008
IEEE
14 years 2 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
BC
2000
95views more  BC 2000»
13 years 7 months ago
Cerebellar learning of accurate predictive control for fast-reaching movements
Long conduction delays in the nervous system prevent the accurate control of movements by feedback control alone. We present a new, biologically plausible cerebellar model to study...
Jacob Spoelstra, Nicolas Schweighofer, Michael A. ...
ICASSP
2010
IEEE
13 years 7 months ago
Simulating dynamic communication systems using the core functional dataflow model
The latest communication technologies invariably consist of modules with dynamic behavior. There exists a number of design tools for communication system design with their foundat...
Nimish Sane, Chia-Jui Hsu, José Luis Pino, ...