Sciweavers

74 search results - page 7 / 15
» Data Access Partitioning for Fine-grain Parallelism on Multi...
Sort
View
ICPP
1998
IEEE
13 years 12 months ago
A memory-layout oriented run-time technique for locality optimization
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
Yong Yan, Xiaodong Zhang, Zhao Zhang
SASP
2008
IEEE
153views Hardware» more  SASP 2008»
14 years 2 months ago
TRaX: A Multi-Threaded Architecture for Real-Time Ray Tracing
Ray tracing is a technique used for generating highly realistic computer graphics images. In this paper, we explore the design of a simple but extremely parallel, multi-threaded, ...
Josef B. Spjut, Solomon Boulos, Daniel Kopta, Erik...
IEEEPACT
2000
IEEE
14 years 1 days ago
Global Register Partitioning
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
Jason Hiser, Steve Carr, Philip H. Sweany
IPPS
2009
IEEE
14 years 2 months ago
Early experiences on accelerating Dijkstra's algorithm using transactional memory
In this paper we use Dijkstra’s algorithm as a challenging, hard to parallelize paradigm to test the efficacy of several parallelization techniques in a multicore architecture....
Nikos Anastopoulos, Konstantinos Nikas, Georgios I...
CGO
2006
IEEE
14 years 1 months ago
Compiler-directed Data Partitioning for Multicluster Processors
Multicluster architectures overcome the scaling problem of centralized resources by distributing the datapath, register file, and memory subsystem across multiple clusters connec...
Michael L. Chu, Scott A. Mahlke