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141
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ICS
2000
Tsinghua U.
15 years 7 months ago
Characterizing processor architectures for programmable network interfaces
The rapid advancements of networking technology have boosted potential bandwidth to the point that the cabling is no longer the bottleneck. Rather, the bottlenecks lie at the cros...
Patrick Crowley, Marc E. Fiuczynski, Jean-Loup Bae...
139
Voted
TPDS
2010
144views more  TPDS 2010»
15 years 1 months ago
Performance Evaluation of Dynamic Speculative Multithreading with the Cascadia Architecture
—Thread-level parallelism (TLP) has been extensively studied in order to overcome the limitations of exploiting instruction-level parallelism (ILP) on high-performance superscala...
David A. Zier, Ben Lee
157
Voted
HPCA
1998
IEEE
15 years 7 months ago
Performance Study of a Concurrent Multithreaded Processor
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
Jenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, Pen-Chu...
90
Voted
EUROPAR
2001
Springer
15 years 8 months ago
Improving Conditional Branch Prediction on Speculative Multithreading Architectures
Chitaka Iwama, Niko Demus Barli, Shuichi Sakai, Hi...
122
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MICRO
1998
IEEE
139views Hardware» more  MICRO 1998»
15 years 7 months ago
A Dynamic Multithreading Processor
We present an architecture that features dynamic multithreading execution of a single program. Threads are created automatically by hardware at procedure and loop boundaries and e...
Haitham Akkary, Michael A. Driscoll