This paper presents a performance analysis of an accelerated 2-D rigid image registration implementation that employs the Compute Unified Device Architecture (CUDA) programming e...
This paper describes a novel approach to generate an optimized schedule to run threads on distributed shared memory (DSM) systems. The approach relies upon a binary instrumentatio...
We present a novel, inexpensive, coarse tracking system that determines a person’s approximate 2D location and 1D head orientation in an indoor environment. While this coarse tr...
Service Oriented EXtensible Modeling and Simulation Supporting Environment Architecture (SO-XMSSEA) is presented based on XMSF thinking and the new technology development of web s...
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...