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» Datapath Scheduling using Dynamic Frequency Clocking
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ISLPED
2006
ACM
145views Hardware» more  ISLPED 2006»
14 years 1 months ago
An optimal analytical solution for processor speed control with thermal constraints
As semiconductor manufacturing technology scales to smaller device sizes, the power consumption of clocked digital ICs begins to increase. Dynamic voltage and frequency scaling (D...
Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Ch...
ISORC
2009
IEEE
14 years 2 months ago
Embedded JIT Compilation with CACAO on YARI
Java is one of the most popular programming languages for the development of portable workstation and server applications available today. Because of its clean design and typesafe...
Florian Brandner, Tommy Thorn, Martin Schoeberl
SIGOPS
2008
100views more  SIGOPS 2008»
13 years 5 months ago
Power management in the EPOS system
Power management strategies for embedded systems typically rely on static, application driven deactivation of components (e.g. sleep, suspend), or on dynamic voltage and frequency...
Geovani Ricardo Wiedenhoft, Lucas Francisco Wanner...
OSDI
2002
ACM
14 years 7 months ago
Vertigo: Automatic Performance-Setting for Linux
Combining high performance with low power consumption is becoming one of the primary objectives of processor designs. Instead of relying just on sleep mode for conserving power, a...
Krisztián Flautner, Trevor N. Mudge
FPL
2006
Springer
140views Hardware» more  FPL 2006»
13 years 11 months ago
A Thermal Management and Profiling Method for Reconfigurable Hardware Applications
Given large circuit sizes, high clock frequencies, and possibly extreme operating environments, Field Programmable Gate Arrays (FPGAs) are capable of heating beyond their designed...
Phillip H. Jones, John W. Lockwood, Young H. Cho