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EH
2003
IEEE
127views Hardware» more  EH 2003»
14 years 2 months ago
Comparing Different Serial and Parallel Heuristics to Design Combinational Logic Circuits
In this paper, we perform a comparative study of different heuristics used to design combinational logic circuits. The use of local search hybridized with a genetic algorithm and ...
Carlos A. Coello Coello, Enrique Alba, Gabriel Luq...
IPPS
2003
IEEE
14 years 2 months ago
A Genetic Approach to Planning in Heterogeneous Computing Environments
Planning is an artificial intelligence problem with a wide range of real-world applications. Genetic algorithms, neural networks, and simulated annealing are heuristic search met...
Han Yu, Dan C. Marinescu, Annie S. Wu, Howard Jay ...
LAWEB
2003
IEEE
14 years 2 months ago
Clustering the Chilean Web
We perform a clustering of the Chilean Web Graph using a local fitness measure, optimized by simulated annealing, and compare the obtained cluster distribution to that of two mod...
Satu Virtanen
GLVLSI
2000
IEEE
105views VLSI» more  GLVLSI 2000»
14 years 1 months ago
An evolutionary approach to timing driven FPGA placement
: We propose a novel evolutionary approach to the problem of timing-driven FPGA placement. The method used is evolutionary programming (EP) with incremental position encoded in the...
R. Venkatraman, Lalit M. Patnaik
ACISP
2000
Springer
14 years 1 months ago
Two-Stage Optimisation in the Design of Boolean Functions
This paper shows how suitable choice of cost function can significantly affect the power of optimisation methods for the synthesising of Boolean functions. In particular we show ...
John A. Clark, Jeremy Jacob