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DAC
1995
ACM
14 years 27 days ago
Multi-way Partitioning for Minimum Delay for Look-Up Table Based FPGAs
In this paper we present a set cover based approach (SCP) to multi-way partitioning for minimum delay for Look-Up Table based FPGAs. SCP minimizes the number of chip-crossings on ...
Prashant Sawkar, Donald E. Thomas
AAAI
2008
13 years 11 months ago
A General Framework for Generating Multivariate Explanations in Bayesian Networks
Many existing explanation methods in Bayesian networks, such as Maximum a Posteriori (MAP) assignment and Most Probable Explanation (MPE), generate complete assignments for target...
Changhe Yuan, Tsai-Ching Lu
ASPDAC
2008
ACM
109views Hardware» more  ASPDAC 2008»
13 years 11 months ago
TCG-based multi-bend bus driven floorplanning
Abstract--In this paper, the problem of bus driven floorplanning is addressed. Given a set of modules and bus specifications, a floorplan solution including the bus routes will be ...
Tilen Ma, Evangeline F. Y. Young
ASPDAC
2005
ACM
119views Hardware» more  ASPDAC 2005»
13 years 11 months ago
CMP aware shuttle mask floorplanning
- By putting different chips on the same mask, shuttle mask (or multiple project wafer) provides an economical solution for low volume designs and design prototypes to share the ri...
Gang Xu, Ruiqi Tian, David Z. Pan, Martin D. F. Wo...
DAC
2005
ACM
13 years 11 months ago
Unified high-level synthesis and module placement for defect-tolerant microfluidic biochips
Microfluidic biochips promise to revolutionize biosensing and clinical diagnostics. As more bioassays are executed concurrently on a biochip, system integration and design complex...
Fei Su, Krishnendu Chakrabarty