A sequential realization of multiple-output logic functions is presented. A conventional sequential realization is based on SBDDs (Shared reduced ordered Binary Decision Diagrams)...
A framework for scheduling a number of di erent real-time applications on a single shared preemptable processor is proposed. This framework enforces complete isolation among the d...
The comprehension of the dynamic and static structure of a system is of main importance for purposes of adding features, bug solving, and for redesign activities. This holds parti...
This paper presents a PC based software running on PC dedicated to the training in sub-micron CMOS VLSI design. The software firstly consists in a HDL-based schematic editor with ...
With the XC6200 FPGA Xilinx introduced the first commercially available FPGA designed for reconfigurable computing. It has a completely new internal architecture, so new design alg...
Reiner W. Hartenstein, Michael Herz, Frank Gilbert