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» Defect Tolerance in Multiple-FPGA Systems
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ISSTA
2009
ACM
14 years 4 months ago
Specifying the worst case: orthogonal modeling of hardware errors
During testing, the execution of valid cases is only one part of the task. Checking the behavior in boundary situations and in the presence of errors is an equally important subje...
Jewgenij Botaschanjan, Benjamin Hummel
DAC
2005
ACM
13 years 11 months ago
Unified high-level synthesis and module placement for defect-tolerant microfluidic biochips
Microfluidic biochips promise to revolutionize biosensing and clinical diagnostics. As more bioassays are executed concurrently on a biochip, system integration and design complex...
Fei Su, Krishnendu Chakrabarty
MTDT
2003
IEEE
100views Hardware» more  MTDT 2003»
14 years 3 months ago
Optimal Spare Utilization in Repairable and Reliable Memory Cores
Advances in System-on-Chip (SoC) technology rely on manufacturing and assembling high-performance system cores for many critical applications. Among these cores, memory occupies t...
Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-...
CLEIEJ
2007
90views more  CLEIEJ 2007»
13 years 9 months ago
Software - Implemented Self-healing System
The term “Self-healing” denotes the capability of a software system in dealing with bugs. Fault tolerance for dependable computing is to provide the specified service through ...
Goutam Kumar Saha
ISCA
2012
IEEE
320views Hardware» more  ISCA 2012»
12 years 6 days ago
Viper: Virtual pipelines for enhanced reliability
The reliability of future processors is threatened by decreasing transistor robustness. Current architectures focus on delivering high performance at low cost; lifetime device rel...
Andrea Pellegrini, Joseph L. Greathouse, Valeria B...