In this paper we present a processor microarchitecture that can simultaneously execute multiple threads and has a clustered design for scalability purposes. A main feature of the ...
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
A novel dynamic register renaming approach is proposed in this work. The key idea of the novel scheme is to delay the allocation of physical registers until a late stage in the pi...
: Events are occurrence instances of actions. The thesis of this paper is that the use of “actions”, instead of events, greatly simplifies the problem of concurrent debugging....
Abstract. In this paper we study a special operator for sequential composition, which is de ned relative to a dependency relation over the actions of a given system. The idea is th...