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TC
2010
13 years 5 months ago
PERFECTORY: A Fault-Tolerant Directory Memory Architecture
—The number of CPUs in chip multiprocessors is growing at the Moore’s Law rate, due to continued technology advances. However, new technologies pose serious reliability challen...
Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
IEEEPACT
2006
IEEE
14 years 1 months ago
Complexity-based program phase analysis and classification
Modeling and analysis of program behavior are at the foundation of computer system design and optimization. As computer systems become more adaptive, their efficiency increasingly...
Chang-Burm Cho, Tao Li
ICS
2005
Tsinghua U.
14 years 1 months ago
Reducing latencies of pipelined cache accesses through set prediction
With the increasing performance gap between the processor and the memory, the importance of caches is increasing for high performance processors. However, with reducing feature si...
Aneesh Aggarwal
CCGRID
2009
IEEE
14 years 2 months ago
BLAST Application with Data-Aware Desktop Grid Middleware
—There exists numerous Grid middleware to develop and execute programs on the computational Grid, but they still require intensive work from their users. BitDew is made to facili...
Haiwu He, Gilles Fedak, Bing Tang, Franck Cappello
CCGRID
2008
IEEE
14 years 2 months ago
Modeling "Just-in-Time" Communication in Distributed Real-Time Multimedia Applications
—The research area of Multimedia Content Analysis (MMCA) considers all aspects of the automated extraction of new knowledge from large multimedia data streams and archives. In re...
R. Yang, Robert D. van der Mei, D. Roubos, Frank J...