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FPL
2009
Springer
101views Hardware» more  FPL 2009»
14 years 1 months ago
An accelerator for K-TH nearest neighbor thinning based on the IMORC infrastructure
The creation and optimization of FPGA accelerators comprising several compute cores and memories are challenging tasks in high performance reconfigurable computing. In this paper...
Tobias Schumacher, Christian Plessl, Marco Platzne...
ICSE
2003
IEEE-ACM
14 years 9 months ago
Pattern Oriented Software Development: Moving Seamlessly from Requirements to Architecture
Requirements Engineering (RE) deals with the early phases of software engineering namely requirement elicitation, modeling, specification and validation. Architecture of a softwar...
M. S. Rajasree, P. Jithendra Kumar Reddy, D. Janak...
DAC
2009
ACM
14 years 10 months ago
Exploring serial vertical interconnects for 3D ICs
Three-dimensional integrated circuits (3D ICs) offer a promising solution to overcome the on-chip communication bottleneck and improve performance over traditional two-dimensional...
Sudeep Pasricha
ERSA
2007
177views Hardware» more  ERSA 2007»
13 years 10 months ago
Energy-Aware System Synthesis for Reconfigurable Chip Multiprocessors
- Even though state-of-the-art FPGAs present new opportunities in exploring low-cost high-performance architectures for floating-point scientific applications, they also pose serio...
Xiaofang Wang, Sotirios G. Ziavras, Jie Hu
SIGCOMM
2009
ACM
14 years 3 months ago
CrossTalk: scalably interconnecting instant messaging networks
We consider the problem of interconnecting a simple type of social network: Instant Messaging services. Today, users are members of various IM communities such as AOL, Yahoo, and ...
Marti A. Motoyama, George Varghese