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» Design Principles for Combiners with Memory
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JOC
2008
92views more  JOC 2008»
13 years 8 months ago
Cryptanalysis of an E0-like Combiner with Memory
In this paper, we study an E0-like combiner with memory as the keystream generator. First, we formulate a systematic and simple method to compute correlations of the FSM output seq...
Yi Lu 0002, Serge Vaudenay
ACMMSP
2004
ACM
92views Hardware» more  ACMMSP 2004»
14 years 2 months ago
Instruction combining for coalescing memory accesses using global code motion
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatan...
ISCAS
2008
IEEE
162views Hardware» more  ISCAS 2008»
14 years 3 months ago
Spin-transfer torque magnetoresistive content addressable memory (CAM) cell structure design with enhanced search noise margin
— This paper presents a new memory cell structure for content addressable memory (CAM) based on magnetic tunneling junction (MTJ). Each CAM cell employs a pair of differential MT...
Wei Xu, Tong Zhang, Yiran Chen
VISUAL
1999
Springer
14 years 25 days ago
Visual Presentations in Multimedia Learning: Conditions that Overload Visual Working Memory
How should we design visual presentations to explain how a complex system works? One promising approach involves multimedia presentation of explanations in visual and verbal format...
Roxana Moreno, Richard E. Mayer
MTDT
2003
IEEE
105views Hardware» more  MTDT 2003»
14 years 1 months ago
A Testability-Driven Optimizer and Wrapper Generator for Embedded Memories
Memory cores (especially SRAM cores) used on a system chip usually come from a memory compiler. Commercial memory compilers have their limitation— a large memory may need to be ...
Rei-Fu Huang, Li-Ming Denq, Cheng-Wen Wu, Jin-Fu L...