605 search results - page 8 / 121 » Design Principles for Combiners with Memory |
ISCAPDCS
2004
13 years 10 months ago
2004
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past de...
CAE
2007
13 years 11 months ago
2007
![memory [en]code - Building a Collective Memory within a Tabletop Installation](https://www.sciweavers.org/files/imagecache/thumbnail/imagecache/memory_en_code_building_a_collective_memory_within_a_tabletop_installation_CAE_2007.jpg "memory [en]code - Building a Collective Memory within a Tabletop Installation")
In this paper, we introduce memory [en]code, a project that evolved through an art+science collaboration. memory [en]code is an interactive tabletop installation that visualizes d...
CLUSTER
2005
IEEE
14 years 2 months ago
2005
IEEE
Current operating systems offer basic support for network interface controllers (NICs) supporting remote direct memory access (RDMA). Such support typically consists of a device d...
OGAI
1993
14 years 20 days ago
1993
Fuzzy controllers are designed to work with knowledge in the form of linguistic control rules. But the translation of these linguistic rules into the framework of fuzzy set theory ...
IJRR
2007
13 years 8 months ago
2007
This paper proposes an algorithm that drives a unicycle type robot to a desired path, including obstacle avoidance capabilities. The path-following control design relies on Lyapun...