Sciweavers

79 search results - page 9 / 16
» Design Space Exploration for Massively Parallel Processor Ar...
Sort
View
EH
2004
IEEE
163views Hardware» more  EH 2004»
13 years 11 months ago
Towards Evolvable Analog Artificial Neural Networks Controllers
This work deals with the design of analog circuits for Artificial Neural Networks (ANNs) controllers using an Evolvable Hardware (EHW) platform. ANNs are massively parallel system...
José Franco Machado do Amaral, Jorge Lu&iac...
PLDI
1993
ACM
13 years 12 months ago
Global Optimizations for Parallelism and Locality on Scalable Parallel Machines
Data locality is critical to achievinghigh performance on large-scale parallel machines. Non-local data accesses result in communication that can greatly impact performance. Thus ...
Jennifer-Ann M. Anderson, Monica S. Lam
ASAP
2006
IEEE
110views Hardware» more  ASAP 2006»
14 years 1 months ago
Loop Transformation Methodologies for Array-Oriented Memory Management
Abstract – The storage requirements in data-dominant signal processing systems, whose behavior is described by arraybased, loop-organized algorithmic specifications, have an imp...
Florin Balasa, Per Gunnar Kjeldsberg, Martin Palko...
ICVS
2001
Springer
14 years 8 days ago
Compiling SA-C Programs to FPGAs: Performance Results
Abstract. At the first ICVS, we presented SA-C (“sassy”), a singleassignment variant of the C programming language designed to exploit both coarse-grain and fine-grain parallel...
Bruce A. Draper, A. P. Wim Böhm, Jeffrey Hamm...
HPCA
1998
IEEE
14 years 2 days ago
FPGA Based Custom Computing Machines for Irregular Problems
Over the past few years there has been increased interest in building custom computing machines (CCMs) as a way of achieving very high performance on specific problems. The advent...
David Abramson, Paul Logothetis, Adam Postula, Mar...