62 search results - page 3 / 13 » Design and Evaluation of a Symbolic and Abstraction-Based Mo... |
IRI
2008
IEEE
14 years 2 months ago
2008
IEEE
—Supply chain [2], [6] is an important component of business operations. Understanding its stochastic behaviors is the key to risk analysis and performance evaluation in supply c...
SIGSOFT
2003
ACM
14 years 9 months ago
2003
ACM
Memory corruption errors lead to non-deterministic, elusive crashes. This paper describes ARCHER (ARray CHeckER) a static, effective memory access checker. ARCHER uses path-sensit...
FMCAD
2000
Springer
14 years 4 hour ago
2000
Springer
Abstract. This paper presents a scalable method for parallel symbolic on-the-fly model checking in a distributed memory environment. Our method combines a scheme for on-the-fly mod...
BCS
2008
13 years 9 months ago
2008
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...
JILP
2002
13 years 8 months ago
2002
As microprocessor designs continue to evolve, many optimizations reach a point of diminishing returns. We introduce HLS, a hybrid processor simulator which uses statistical models...