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DELTA
2006
IEEE
13 years 11 months ago
Implementation of Four Real-Time Software Defined Receivers and a Space-Time Decoder using Xilinx Virtex 2 Pro Field Programmabl
This paper describes the concept, architecture, development and demonstration of a real time, high performance, software defined 4-receiver system and a space time decoder to be i...
Peter J. Green, Desmond P. Taylor
VLSI
2010
Springer
13 years 2 months ago
A design workflow for dynamically reconfigurable multi-FPGA systems
Multi-FPGA systems (MFS's) represent a promising technology for various applications, such as the implementation of supercomputers and parallel and computational intensive emu...
Alessandro Panella, Marco D. Santambrogio, Frances...
GECCO
2010
Springer
140views Optimization» more  GECCO 2010»
13 years 8 months ago
Shared memory genetic algorithms in a multi-agent context
In this paper we present a concurrent implementation of genetic algorithms designed for shared memory architectures intended to take advantage of multi-core processor platforms. O...
Dana Vrajitoru
VTC
2008
IEEE
102views Communications» more  VTC 2008»
14 years 2 months ago
Two-Level Early Stopping Algorithm for LTE Turbo Decoding
—The design of LTE turbo coding chain suitable for flexible parallel and pipelined hardware implementations is presented. The hierarchical data structure further offers an opport...
Jung-Fu Cheng
ISPDC
2008
IEEE
14 years 2 months ago
Computing Equilibria in Bimatrix Games by Parallel Support Enumeration
We consider the problem of computing all Nash equilibria in bimatrix games (i.e., nonzero-sum two-player noncooperative games). Computing all Nash equilibria for large bimatrix ga...
Jonathan Widger, Daniel Grosu