Sciweavers

862 search results - page 149 / 173
» Design and Implementation of the TRIPS Primary Memory System
Sort
View
EUROPAR
2001
Springer
13 years 12 months ago
Building TMR-Based Reliable Servers Despite Bounded Input Lifetimes
This paper is on the construction of a server subsystem in a client/server system in an application context where the number of potential clients can be arbitrarily large. The imp...
Paul D. Ezhilchelvan, Jean-Michel Hélary, M...
SIGMETRICS
2008
ACM
140views Hardware» more  SIGMETRICS 2008»
13 years 7 months ago
Scalable VPN routing via relaying
Enterprise customers are increasingly adopting MPLS (Multiprotocol Label Switching) VPN (Virtual Private Network) service that offers direct any-to-any reachability among the cust...
Changhoon Kim, Alexandre Gerber, Carsten Lund, Dan...
ICS
2003
Tsinghua U.
14 years 16 days ago
AEGIS: architecture for tamper-evident and tamper-resistant processing
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, M...
SENSYS
2009
ACM
14 years 2 months ago
Darjeeling, a feature-rich VM for the resource poor
The programming and retasking of sensor nodes could benefit greatly from the use of a virtual machine (VM) since byte code is compact, can be loaded on demand, and interpreted on...
Niels Brouwers, Koen Langendoen, Peter Corke
IISWC
2006
IEEE
14 years 1 months ago
Performance Analysis of Sequence Alignment Applications
— Recent advances in molecular biology have led to a continued growth in the biological information generated by the scientific community. Additionally, this area has become a m...
Friman Sánchez, Esther Salamí, Alex ...