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» Design and Implementation of the TRIPS Primary Memory System
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IPPS
2003
IEEE
14 years 1 months ago
So Many States, So Little Time: Verifying Memory Coherence in the Cray X1
This paper investigates a complexity-effective technique for verifying a highly distributed directory-based cache coherence protocol. We develop a novel approach called “witnes...
Dennis Abts, Steve Scott, David J. Lilja
PVLDB
2008
96views more  PVLDB 2008»
13 years 8 months ago
H-store: a high-performance, distributed main memory transaction processing system
Our previous work has shown that architectural and application shifts have resulted in modern OLTP databases increasingly falling short of optimal performance [10]. In particular,...
Robert Kallman, Hideaki Kimura, Jonathan Natkins, ...
SIGSOFT
1994
ACM
14 years 16 days ago
Exploiting Style in Architectural Design Environments
As the design of software architectures emerges as a discipline within software engineering, it will become increasingly important to support architectural description and analysi...
David Garlan, Robert Allen, John Ockerbloom
GLOBECOM
2008
IEEE
14 years 2 months ago
Cross-Layer Error Control Optimization in WiMAX
—WiMAX is one of the most promising emerging broadband wireless technologies. As a consequence, data transfer performance optimization represents a crucial issue due to TCP limit...
Dzmitry Kliazovich, Tommaso Beniero, Sergio Dalsas...
VEE
2009
ACM
107views Virtualization» more  VEE 2009»
14 years 3 months ago
Architectural support for shadow memory in multiprocessors
Runtime monitoring support serves as a foundation for the important tasks of providing security, performing debugging, and improving performance of applications. Often runtime mon...
Vijay Nagarajan, Rajiv Gupta